sFPDP vs 10 Gb Ethernet
This article was first written by Patrick Mechin (CEO of TECHWAY) & Philippe Marvin (Field Application Engineer at TECHWAY), and then edited by Jerry Gipper (Editorial Director of VITA Technologies). The article is featured in VITA Technologies Spring 2021 issue.
Today’s sensors can collect and generate huge amounts of data, data that needs to be moved somewhere for processing. There are several alternatives for communication links between sensors and processing elements. Designers want to benefit from the highest speed protocols available to design or upgrade their systems. A popular choice is Ethernet but there are alternatives that have better solutions.
One of those choices is serial Front Panel Data Port (sFPDP) as defined by VITA 17.1. sFPDP presents a low-latency protocol for sensors data interconnection which is widely utilized by the military embedded industry. This article presents the pros and cons for this alternative.
Let’s compare sFPDP vs 10 Gb Ethernet.
sFPDP: Optimized Data Transport
The original VITA 17 standard, called Front Panel Data Port (FPDP), was defined to meet the need of high-speed and optimized communication between two points inside a processing cabinet – usually 2 VME racks.
The FPDP bus was intended to provide data transfer between two or more VMEbus boards at up to 160MB/s with the lowest possible latency, while not compromising existing VMEbus and other connections on the chassis P1 and P2 connectors. FPDP was connected by means of an 80-conductor ribbon cable connector at the front panel of the VMEbus board. The wiring topology was in the form of a bus and multiple FPDP busses may coexist in a single VMEbus enclosure. FPDP was restricted to short distances (less than 1m), mainly point-to-point and based on a very lightweight protocol focused on efficiency rather than functionality.
Beginning in the early 2000’s, communication buses started moving from parallel to serial to offer higher bandwidth and longer distance capabilities. For the embedded industry, the VITA 17.1 serial FPDP (sFPDP) was created. The initial instance, released in 2015, supported data rates up to 10 Gbaud.
As in the original parallel bus version, sFPDP is simple to implement and use. Engineers can implement it within an FPGA or ASIC with little difficulty.
sFPDP is a well-known protocol in defense, research and medical markets. Major key-players – Abaco Systems, Curtiss-Wright, Galleon EC, Mercury Systems, Pentek and others have designed many products to simplify the implementation of sFPDP that do not require additional FPGA development by the user. These products are used in embedded applications through rugged XMC modules or in lab equipment (data recorders or test benches). Thanks to the widespread deployment, sFPDP is a staple for real-time applications in the field of sensor/computer links.
Thanks to these advantages, the sFPDP protocol has been widely adopted by the defense engineering community for applications where high-speed links and real-time are mandatory. For example, communication between complex sensors and processing units in harsh environments for applications in RADAR, SONAR, ERM, and more.
The evolution of sFPDP
The sFPDP standard was updated in 2018 to move away from the concept of defined link rates and instead allow any link rate to be used. The ANSI/VITA 17.3-2018 sFPDP Gen 3 standard also supports multi-lane channel bonding and advanced 64B/67B encoding to greatly increase the bandwidth capabilities of the link.
In addition, the serialization enabled the use of optical links, significantly increasing distances of communication, protection against electromagnetic interferences, and opened the door for communication rates well above 10 Gbps.
Serial FPDP Gen 3.0 is conceptually based on the control signals and data structure used by Serial FPDP Gen 1.0, and consequentially, is designed to allow a straightforward migration from sFPDP Gen 1.0 to sFPDP Gen 3.0. While not directly compatible with sFPDP Gen 1.0 at the physical level due to the different encoding scheme used, the protocol defined in this standard supports the same framing types, flow control, and link topologies as found in the sFPDP Gen 1.0 standard. Serial FPDP Gen 3.0 supports all of the features found in the Serial FPDP Gen 1.0 standard and also utilizes three different frame types (Serial Fiber Frames) to implement the four data frame types originally defined in the parallel FPDP standard. The primary objective of the Serial FPDP Gen 3.0 standard is to dramatically increase the bandwidth and scalability of the Gen 1.0 standard while remaining fully backward compatible at the user interface level to ensure easy system upgrades from Gen 1.0 to Gen 3.0.
Serial FPDP Gen 3.0 offers many enhancements not found in the Gen 1.0 standard:
- Multi-Lane Channel Bonding
- Full CRC protection over all status and control signals
- Over 99% bandwidth efficient with 64B/67B encoding and scrambling
- Individual User Data Block identification and error reporting
- Provides a guaranteed delivery and re-transmit mechanism
The new standard allows a higher than 10 Gbps transfer rate with no limit. In addition to this key feature, new functionalities expand sFPDP field of applications. ANSI/VITA 17.3-2018 enables direct communication between sensors and processing boards but also enable communication with each other over greater distances.
In opposition to “general purpose” protocols or networks, the sFPDP protocol is dedicated to point-to-point communication. It reduces the protocol overhead and optimizes latency.
Thanks to sFPDP, the links are:
- Efficient – the ratio, total of transmitted-data / effective volume of transmitted-data, is close to 1.
- Determinist – sFPDP’s ease of use allows FPGA implementation which free jitters from CPU and Linux.
- Low-latency – The light and tunable data framing allows data transfers with low-latency. This low latency is mandatory from demanding applications as Electronics countermeasures or simulation.
- Reliability – Topologies offered by sFPDP protocol – point to point, copy, copy loop – prevent any loss of frames.
At the same time, the Industrial market has seen the emergence and popularization of 10 Gb Ethernet. In a few short years, this trend has spread into embedded applications. Today, system architects compare both protocols as equal.
Yet, sFPDP and 10 Gb Ethernet are not real competitors.
sFPDP and Ethernet are modern and efficient solutions for data-transmission but if one looks at their origin, you will find out their conception was far from each other.
There are 3 types of data interconnections:
- Local bus: allows data-transfer into an electronic board or into a chassis (for instance VME or a PC)
- Interfaces: media topologies that are usually point-to-point (point-to-multiple) optimized for performance, maximum data rate, and real-time data transfer. The implementation is simple.
- Networks: focused on interoperability and flexibility of use (add dynamic nodes, routing, etc.). These protocols are difficult to implement into FPGA, a CPU with an operating system is the best option. Even if networks can operate at high rate, they are not design for real-time capabilities.
sFPDP vs 10 Gb Ethernet: Let’s compare
Ethernet is ubiquitous, so hardware choices are limitless. An attractive advantage of Ethernet is the abundance of low-cost, high performance equipment driven by the IT industry.
Ethernet has key advantages for embedded applications and real-time.
- Performance’s evolutions of Ethernet allow to use it for high-speed applications (10, 25, 40 Gb Ethernet).
- Ethernet UPD implementation offers high bandwidth capabilities for data transfer.
- Popularization and wide deployment of Ethernet leads to low-cost hardware dedicated to IT or consumer market.
One more thing, Ethernet and its IP, TCP or UDP protocols do not required special hardware or firmware design skills or specific hardware.
At first glance, sFPDP and Ethernet appear to be remarkably similar. Yet, if we look deeper, we will see differences in their concepts. These differences will impact the system performance of your project.
Both support similar data rates at the physical layer. However, sFPDP is more efficient with its lighter protocol stack. This reduces software overhead and protocol layers making it a faster solution given equal hardware implementations.
One of the strengths of Ethernet UDP/IP is that it is “specific hardware free”. But it must be managed by the CPU and its operating system which are not always the best tools to manage the protocol. Therefore, lot of CPU resources will be wasted and removed from application data processing. Alternatively, you can implement a dedicated offload engine but then you are back to dedicated hardware. sFPDP can easily be implemented in an FPGA, frequently available in sensor applications, thus freeing the CPU from this task.
Winner: sFPDP, if an FPGA is available
sFPDP is a light protocol (no connection or session) which allows for minimum latency, especially important in electronic countermeasures where real-time responses are critical. You can throw a lot of processing power at Ethernet, but it will still come up short compared to sFPDP.
Determinism is critical for real-time response. For example, time-stamping data frames for higher accuracy, important for recording analysis and accurate play-back. This accuracy is impossible in the case where the CPU is used to execute a UDP/IP stack on Ethernet networks. To obtain equal accuracy, you need to deploy complex protocols which are not compliant with embedded applications.
It is possible to implement the UDP/IP protocol on an FPGA, but it is not efficient, and you should question your choice of running a heavy protocol with low determinism if your platform is FPGA based and a dedicated solution such as sFPDP exists.
Using an FPGA for sFPDP makes it possible to obtain a high degree of determinism for the reception and emission of data and to manage the protocol.
One of the biggest advantages of Ethernet is simplicity and flexibility. Thanks to switches, hubs, sniffers (for debug) use, you can build complex, repetitive, and evolving networks. However, the more complex the network, the less deterministic the data flow. In addition, On the other hand, if your application implements point-to-point connection with Ethernet, most of the feature advantages of Ethernet are wasted.
sFPDP offers several fundamental topology choices basic system, flow control, bi-directional data flow, copy mode, and copy/loop mode that allow designers to, temporarily or definitively, add communication nodes into a point-to-point link without modify the performance of the system. All of these modes support the maximum throughput performance.
At the first sight, Ethernet appears to be a nice alternative for data-transmission, driven by low-cost equipment. But once you start to consider the requirements of real-time applications, the Ethernet option appears more challenging and riskier.
If your application requires data-transmission with guaranteed high performance data throughput, secured latency and easy-implementation, sFPDP is the best solution.
Products like the TECHWAY RAVEN PCIe board with four VITA 17.3 sFPDP ports and FPGA processing can be the best way to connect to high performance sensors. Based on a Xilinx Kintex-7 FPGA, this sFPDP platform supports up to 10 Gbps data rate per link. RAVEN includes support for Flow Control, CRC, Framed/Unframed, Copy/Loop Modes and compliant with copper or fiber cabling.
Be sure to consider sFPDP as your first choice for a high-speed and optimized communication channel in your next project.